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Report on the Conference 2012 

CIPS 2012 – Reliability is improving by orders of magnitude 

5/9/2012 

 

235 engineers and scientists attended the CIPS 2012 at Nuremberg from March 6 to 8. They came from 17 countries in Asia, America and Europe.

CIPS 2012 stands for the 7th International Conference on Integrated Power Electronics Systems. The conference is organized by ETG, the Power Engineering Society within VDE and co-organized by ECPE, the European Center for Power Electronics. IEEE PELS and ZVEI are technical co-sponsors.

The program for this year's conference included 14 conference sessions with the presentation of 77 technical papers: Three Keynote papers, 9 Invited papers, and 65 regular papers. 25 of the regular papers were presented in the dialogue/ poster session. It is worth to mention that 22 of the papers are coming from industry, 19 from a joint cooperation between industry and academia, and 36 from academia alone.

The main focus of the contributions was on system integration, packaging, high power modules, wide band gap components, magnetic components and EMI, and systems and components reliability.

The peer reviewed papers are available in printed form (ETG-Fachbericht 133; VDE Verlag GmbH, Berlin – Offenbach; ISBN 978-3-8007-3414-6), on a CD-ROM and will be ready for downloading from the VDE Verlag digital library as well as from the IEEE digital data base Xplore in April.

The conference was opened by a keynote paper on “Extreme Efficiency Power Electronics” presented by Prof. Johann Kolar/ ETH Zurich. His studies are based on a generalized description of degrees of freedom and selected measures for efficiency improvement of power electronics converters. The analysis starts with loss calculations and measurements of all components of the converter. Always a compromise has to be made between efficiency and power density. A control strategy is outlined which ensures maximum efficiency for partial loads. The efficiency of telecom rectifier modules e.g., has been improved from 92% in 1995 to 97% in 2012. Likewise for photovoltaic converters an increase from 93 to 99% has been achieved for Si power semiconductors.

Three sessions dealt with reliability, although it was an issue of many other presentations as well. Prof. Patrick McCluskey/ CALCE University of Maryland, USA, gave an overview in his keynote speech on “Reliability of Power Electronics Under Thermal Loading”. He discussed the dominant failure mechanisms in components, including the power module, capacitors and boards. Specific focus was placed on the power module interconnects including wirebonds, planar interconnect, die attach and substrates, and the reliability concerns associated with increased power levels, increased power density, and higher junction temperatures. Ways of improving packaging design were presented.

Beside the three keynotes Nine invited speakers presented overviews on topics like:

“Advanced Cooling for Power Electronics”: Dr. Sukhvinder Kang/ Aavid, USA, described an improved heat sink with staggered fins which means an increased fin density along the air flow direction. This results in an uniform baseplate temperature of the IGBT module. Regarding liquid cooling helicoidal flow paths were introduced which create a strong secondary flow with high velocity to achieve a high heat transfer coefficient at the flow channel wall and parallel flow paths to reduce liquid velocities and the corresponding pressure gradient.

“Analysis of Innovative Packaging Technologies and Trends for Power Modules”: -  A. Avron/ Yole Development, France

“Electromagnetic Modeling of EMI Input Filters”: Dr. Ivana Kovacevic/ ETH Zurich, Gecko Research GmbH, Switzerland, discussed an efficient design method for EMI filters and power converter systems regarding both electrical functionality and EMC design constraints using GECKO EMC for simulations.

“Combined Reliability Testing: An Approach to Assure Reliability under Complex Loading Conditions”: Dr. Olaf Wittler/ Fraunhofer IZM, Berlin investigated combinations of thermal cycling and vibration as well as moisture and vibration. He concludes that not all of the combinatorial tests yield a shorter testing time.

Integrated Power Electronics has to include passive components as well, and therefore the development of magnetic components and integrated filtering was treated in two sessions. New ways to integrate such components even monolithically using appropriate add – on – technologies will become important for advanced integrated power electronics. Important results concerning the integration op magnetics in the low power regions were treated in the invited paper“Integrated, High Frequency DC-DC Converter Technologies Leading to Monolithic Power Conversion”: Dr. Ashraf Lofti, Enpirion Inc. USA,Q. Li, Prof. Fred Lee/ Virginia Tech, USA

“Integrated High Power Modules”: Prof. Mark Johnson/ University of Nottingham, UK. Constraints and possibilities for higher level integrations from several aspects were treated comprehensively

“SiC and GaN Devices – Competition or Coexistence?”: Prof. Nando Kaminski/ University of Bremen, Dr. Oliver Hilt/ FHB Berlin. It was the aim of the authors to find fields of possible applications for both groups of devices.Currently, it seems that GaN-transistors areideal for high frequency integrated circuits up to 1000 V (maybe 2000 V) and maximum a few 10 A current while SiC devices are rather suited for discrete devices or modules with breakdown voltages abov 1000 V and basically no limit in current. Only Schottky-diodes are in direct competition and it looks like an either-or situation determined by the GaN material quality and cost. The packaging, however, is more and more the limiting factor for wide-band-gap devices and modules with respect to switching speed and high temperature operation.

„Planar Interconnect Technology for Power Module System Integration”: Prof. Norbert Seliger/ HS Rosenheim, Karl Weidner/ Siemens Corporate Technology, Munich. For the first time SiPLIT® – the Siemens Planar Interconnect Technology was presented in a conference. This package features thick Cu interconnects on a high reliable insulating film for power semiconductor chip top contacts. Due to the conductor structure and contact technology, on-resistance and stray inductances are very low compared to state-of-the art wire bonds. In addition large area contacting improves the power cycling capability and surge current robustness significantly. SiPLIT® provides excellent possibilities for system integration, like double side cooling, integration of passives and sensors, etc.


Figure 1: Highly integrated prototype inverter module containing input rectifier, output inverter, current sensors and decoupling capacitors applying the Siemens planar interconnect technology SiPLIT®

 

“Reliability of Planar SKIN Interconnect Technology”: Dr. Uwe Scheuermann/ Semikron, Nuremberg, presented reliability data of the planar SKiN technology. This technology is based on three silver sintered layers: power chip attach on top side to a flexible circuit board, power chip attach to the DBC substrate, and DBC substrate to the heatsink. This solderless power module has the beefit of a very low thermal resistance. The active power cycling results are very impressing: For a temperature swing ? Tj = 70 K (Tjmin = 80°C; Tjmax = 150°C), three million cycles can be achieved. The corresponding failure mode is a fracture in the Ag sintering layer between the chip topside contact and the flexible circuit board. In summary the improvement of power cycle lifetime in comparison to classical base plate modules applying a 70K temperature swing is 190 times for the SKiN technology.

 
Figure 2: Active power cycling result of a Semikron SKiN device for ?Tj = 70K. Three million cycles have been reached which is an improvement of 190 times compared to a standard module. This is an impressive example for improvements by two orders of magnitude obtained from several new technlogies (silver sintering in case of Semikron)
 

Nine regular contributions discussed silver sintering from different points of view: Dr. Karsten Guth et al/ Infineon Technologies, Warstein, compared two emerging technologies for thechip-to-substrate interconnect, namely diffusion soldering and silver sintering. Power cycling testing was chosen to give an application relevant assessment of the reliability performance. Compared with today’s power cycling limit for Tj,max of 150°C, a 30 – 60 fold increase of power cycling reliability was found for both new technologies. The failure happened, however, not in the wirebonds but in the substrate material used.

Mrs. Silke Kraft et al./ Fraunhofer IISB, Erlangen, compared silver sintering DBC (copper metallization on ceramics) and DBA (aluminum metallization on ceramics). The setup with DBC showed a 17, the one with DBA a 2.7 times higher statistical lifetime than the soldered and wire bonded reference. Mrs.Kraft was elected as one of the two winners of the ECPE Young Engineers Award. The other winner is Gernot J Riedel/ ABB Corporate Research, Switzerland for his presentation on”Reliability of Large Area Solder Joints within IGBT Modules: Numerical Modeling and Experimental Results.

Further contributions came from: University and INSA Lyon; Virginia Tech and NBE Technologies; Oak Ridge National Laboratory; Osaka University; Heraeus; Danfoss Silicon Power; Safran Group and University of Bordeaux and Lyon. This represents just a part of worldwide activities in this field. Major goals are reduction of the mechanical force and easier manufacturability.

The conference was closed by a keynote on “SiC Device and Power Module Technologies for Environmentally Friendly Vehicles” which was presented by Dr. Kimimori Hamada/ Toyota Motor Corporation, Japan. He pointed out advantages by using SiC modules due to their higher operation temperature of SiC of 250°C in comparison to 150°C for Si modules. Cooling can be done at higher coolant temperatures with higher cooling power. He explained the necessity for new materials which can withstand higher temperatures as well as higher temperature swings. Toyota is focusing on SiC MOS switches, but several improvements have to be made, like reducing crystalline defects, achieving high electron mobility, and ensuring high reliability of the gate oxide layer. In addition issues for power modules include the development of high-temperature die attaches, plastic sealing, and a high-temperature primer which has to secure the required reliability by adhering the device, lead frame, and plastic.

In summary the CIPS 2012 has sharpened the focus towards system integration by new concepts for packaging and joining. Results of reliability investigations show potentials for increasing the lifetime by factors of 60 to 190. Such improvements will for sure change technologies for future power electronics systems very much, because the benefits are beside reliability electrical, mechanical and thermal too.

The organization committee decided to continue the CIPS in 2014 in March at Nuremberg.


Figure 3: CIPS 2012 General Chair Prof. Leo Lorenz (center), Technical Chairs Prof. Dieter Silber (left) and Prof. Eckhard Wolfgang

 

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