ZuE 2015 - Zuverlässigkeit und Entwurf   

Posterbeiträge 

On the Automated Verification of User-defined MBIST Algorithms
J. Kinseher, M. Richter,I. Polian (U Passau)

Abstract Technology Handling for Generator-Based Analog Circuit Design
B. Prautsch, U. Eichler, T. Reich, A. Puppala (FhG IIS/EAS Dresden) J. Lienig (TU Dresden)

Correcting Delay Faults and Transient Faults in Pipelines
S. Scharoba, T. Koal, H. T. Vierhaus (BTU Cottbus)

Extending Microprocessor Trace Hardware for Fault Injection
M. Gunia, M. Zabel, R. G. Spallek (TU Dresden)

Coverage of Uncertainties in Cyber-Physical Systems
W. Chipman, C. Grimm, C. Radojicic (U Kaiserslautern)

Mixed-Signal Multi-Core Circuit Architecture for a Reliable Task Distribution
J. von Rosen, L. Hedrich (U Frankfurt)

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