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EMLC 2018 - Welcome and Keynote Speakers 

Welcome and Keynote Speakers 


The EMLC2018 Program Committee has defined following

Grenoble Welcome and Keynote Speakers:


Tuesday, June 19th, 2018


Welcome Speaker from the City of Grenoble 
Grenoble-Alpes Métropole Welcomes You

Marie-José Salat,
Vice-President in Charge of Economic development,
industry and Tourism, Grenoble, France


Keynote Presentations

Technology for Optical Sensors

Olivier Noblanc, STMicroelectronics, Crolles, France

CMOS technologies are now widely used in the frame of Image sensors serving a large field of application (consumer, industrial, automotive…) leveraging on the easy access to silicon facilities and availability of software IPs suitable to realize both the CMOS Image Sensors (CIS) and Image Signal Processor (ISP) devices.

The trend to pixel size scaling which have been driving the industry since a while in order to increase the resolution of images in mobile devices is now slowing done with pixel size in reaching the 1μm² or so.

New kinds of pixel and related technologies enabling plenty of other kind of applications are now investigated by many companies. In this field the diversity of pixel sizes and architectures is increasing creating some new challenges for silicon technologist. Lithography and all other process activities are proposing innovative features aiming to offer the best technologies for the targeted products.
STMicroelectronics is deeply involved in this race to innovation proposing a wide range of technologies. The goal of this talk is to summarize some recent developments and the new process features that have been put in place in Crolles facility in order to serve these emerging markets.


The Battle Field of Lithography
Laurent Pain, CEA-LETI, Minatec Campus, Grenoble, France

Lithography is and will remain the key knob for the development and ramp-up of semiconductor technology. Depending the challenge of the device design rules, the patterning strategy drives the future architecture definition and associated performances of our devices.

On this landscape, optical lithography represents the reference lithography solution. Resolution and nowadays alignment performances remains the strategic keys from the process side. However, when cost of ownership starts to be taken into account, final decision of the manager has to be pragmatic.

In that context, optical lithography has some technology challengers as less lithography is without any doubt an attractive solution for the semiconductor industry and opens new alternative patterning techniques may have a high-level of competitive advantages.

They could indeed offer challenging and credible industrial compromises.

Among them

  • The launch of massively parallel mask opportunities for the manufacturing of innovative chips. Now MAPPER production platform is on the path to industrial ramp-up with operational active blanker.
  • UV flash imprint (NIL) in step and repeat mode or at full wafer scale level is also another one of these promising alternatives that offers a large versatility. It can address a large growing demand.
    • The most advanced semiconductor technology nodes supported by CANON
    • A large field of applications such as photonic, bio and optical sensors, lighting, display, photovoltaic. For those technologies, the full wafer-scale imprint strategy may represent a good compromise.
  • Directed Self Assembly by block copolymer is THE complementary patterning solution by excellence that can push very far any type of lithography solution : EUV, 193, ML2, NIL. PS-PMMA platform is already a mature platform and the new high-chi generation is under active development.
  • Taking concrete example issued from the Leti R&D environment, this talk will engage the discussion to position each alternative with respect to the optical lithography reference. The objective will be to present industry references. Even if they are competitive on the paper, they can also present a lot of synergy for the a good and fair overview to understand when and how these technologies could be attractive and become real development of affordable technological options for tomorrow.


Wednesday, June 20th, 2018


Silicon Photonics: from Research to industrial reality
Frédéric Boeuf, Silicon Photonics Technologies Manager,
ST Microelectronics, Crolles, France

In the last 10 years, the development of modern society led to an increasing need for transferring large amount of data. This amount is doubling every 18 months. As a consequence, the need for high-speed, low power and low cost interconnects is increasing.

Traditionally, optics was preferred for the long distance and high-speed transmissions due its lower power consumptions than the Cu-wire-based transmission.
Nevertheless, the development of hyperscale datacenters lead to a need of shorter reach optical interconnects, and in the future high performance computing will also request ultra-high-bandwidth on ultra-short reach. Therefore some high-volume and low cost solution must be found.

During the 1980’s, researchers started to think about optical system relying on the same technology as CMOS chips: silicon material. Indeed, Silicon is transparent in the 1.3-1.5μm wavelength range used in telecom and datacom, and the optical refractive index contrast between Si (3.5) and SiO2 (1.5) is much higher than in glass-based technologies and even InP platform, allowing the fabrication of ultra-compact circuits on SOI wafers.

With this in mind, between 1990’s and 2010’s, researchers demonstrated all the basic building blocks necessary to build an optical device library with Silicon.

In this paper we will give on overview of main markets for Silicon Photonics, describe a 300mm wafer based industrial technology and finally discuss on the weaknesses of the Silicon photonics integration and what would be the future evolution. 

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